In the market for mobile terminals such as cell-phones and tablet PCs, since larger and higher-definition screens have recently been required for chassis of even the same size, so-called frame narrowing designs have been adopted to reduce the distance from the outermost edge to the screen display area (active area). Amid the ongoing frame portion narrowing, drive circuits have accordingly been required to be disposed efficiently in a reduced area of the frame portion.
Such drive circuits employ, for example, a so-called CMOS circuit in which an N-type thin film transistor and a P-type thin film transistor are provided adjacent to each other and connected in a complementary manner to contribute to a reduction in power consumption. In line with this, there has been a need for a layout with better area efficiency in such a case of proximally disposing an N-type thin film transistor and a P-type thin film transistor.